In the post clock switching and clock gating checks, we discussed how important it is to have a glitch free clock. Also, in clock gating checks at a multiplexer, we discussed the conditions wherein a normal multiplexer can be used to propagate a clock without any glitches.
In this post, we will discuss about multiplexer circuit for clock switching which can safely switch clocks without the probability of any glitches under most of the scenarios, hence, also called glitch-less multiplexer.
Definition of clock multiplexer: Let us first define a clock multiplexer "A clock multiplexer is a circuit that can switch the system from one clock to another while the chip is running. The two frequencies may be related to each other, or may to totally unrelated". A clock multiplexer switches the clock without any glitches as the glitch in clock will be hazardous for the system. Hence, a clock multiplexer is also known as a glitchless multiplexer.
Clock multiplexer for switching between two synchronous clocks:
Clock multiplexer for switching between two asynchronous clocks:
Reference: A very detailed and good explanation is provided at below link. I recommend to go through this for complete understanding of the process.
http://www.eetimes.com/document.asp?doc_id=1202359
Also read:
http://www.eetimes.com/document.asp?doc_id=1202359
Also read:
Clock multiplexer will be a standard cell, whether we need to use scan flip flop inside this multiplexer
ReplyDeleteHi
DeleteYou may or may not use depending upon the exposure of the clock to external observations. But nothing would harm making these scan flops in my opinion.