16x1 mux using 4x1 muxes

Implementing 16:1 multiplexer with 4:1 multiplexers: A 16x1 mux can be implemented using 5 4x1 muxes. 4 of these multiplexers can be used as first stage to mux 4 inputs each with two least significant bits of select lines (S0 and S1), resulting in 4 intermediate outputs, which, then can be muxed again using a 4:1 mux. The implementation of 16x1 mux using 4x1 muxes is shown below in figure 1:

Figure 1: Implementing 16:1 mux with the help of 4:1 multiplexers

The above approach assumes that all the inputs are of same priority as regards timing. Can you think of a solution which involves timing and prioritizes some of the inputs? A hint for you is that the solution will require 5 select lines instead of four.

Also read:

• XNOR gate using NAND
• 2:1 mux using NAND gates
• Implement 3-inputs gates using 2:1 muxes
• Time borrowing in latches
• Latch using 2:1 mux

Why is body connected to ground for all nmos and not to VDD

To prevent latch-up in CMOS, the body-source and body-drain diodes should not be forward biased; i.e, body terminal should be at same or lesser voltage than source terminal (for an NMOS; for a PMOS, it should be at higher voltage than source). This condition will be satisfied if we connect all the nmos bodies to their respective sources. But we see that all the body terminals are connected to a common ground.

This is due to the reason that all the nmos transistors share a common substrate, and a substrate can only be biased to one voltage. Although it introduces body effect and makes transistors slower and deviate from ideal mos current equation, there is no other way.

One could achieve different body voltage for all nmos transistors by putting all transistors in different wells, but that would mean a tremendous penalty in terms of area as there needs to be minimum size and separation that needs to be maintained which is huge in comparison to transistor sizes. This is the reason why body is connected to ground for all NMOS.

Similarly, body of all PMOS transitors is connected to a common terminal VDD.