A 3-input XOR gate can be implemented using 2-input XOR gates by cascading 2 2-input XOR gates. Two of the three inputs will feed one of the 2-input XOR gates. The output of the first gate will, then, be XORed with the third input to get the final output.
Let us say, we want to XOR three inputs A,B and C to get the output Z. First, XOR A and B together to obtain intermediate output Y. Then XOR Y and C to obtain Z. The schematic representation to obtain 3-input XOR gate by cascading 2-input XOR gates is shown in figure below:
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This returns 1 if all 3 inputs are 1. It's a parity gate, not XOR.
ReplyDeleteHi
ReplyDeleteYes, the most accepted functionality of a multi-input XOR gate is as an odd-parity checker. :-)
VLSI UNIVERSE is correct. The standard for a multiple input XOR gate is an odd-parity checker. It is also the most useful one.
ReplyDeletehow do i make it so that when all the inputs are on the output is off
ReplyDeleteThat means you want to implement a NAND gate
Deletehow do i implement nand gate in this?
DeleteSorry, your query is not clear
DeleteCode of ex-or gate
ReplyDelete