‘X’ refers to a
signal attaining a value that is ‘unknown’. It can be either ‘0’ or ‘1’. But,
the exact value of the signal is not known. If a simulator is not able to decide
whether a logic value should be logic ‘0’ or logic ‘1’, it will assign a value ‘X’
to the value. An example of ‘X’ source is a logic block that has not been
initialized properly through reset. Having an ‘X’ value at a
node can propagate to the logic lying in the fan-out, thereby increasing the
uncertainty downstream the logic.
How ‘X’ propagates: An ‘X’ value
at the input of a logic gate may or may not propagate to its output depending
upon the states at other inputs of the logic gate. Given below is how different
logic gates react to ‘X’ values:
1) OR
gate: An OR gate can absorb an ‘X’ if the other input has logic ‘1’.
Otherwise, ‘X’ propagates through it. Please refer figure 1 for explanation:
Figure 1: X-propagation through OR gate |
2) AND
gate: An AND gate can absorb ‘X’ if the other input has logic ‘0’.
Otherwise, ‘X’ propagates through it. Please refer figure 2 for explanation:
Figure 2: X-propagation through AND gate |
3) Buffer/inverter:
Since, buffers/inverters are single input gates, an ‘X’ at the input means ‘X’
at the output.
4) XOR
gate: An ‘X’ at one of the inputs of XOR produces ‘X’ at the output no
matter what the
other input state is. Please refer truth table given in Figure 3 for explanation:
Figure 3: X-propagation through XOR gate |
5) Complex
gates: For complex gates, whether ‘X’ will propagate to the output
depends upon the overall function of the ‘X’ input with respect to other gates.
E.g. suppose a gate with function
Z = A + (B * C)
Then, if B input
goes ‘X’, the output will go ‘X’ if A=0 and C=1.
Read also:
1 xor X will give Xbar and not X
ReplyDeleteHi Pramod
DeleteThe "X" we are referring here is different. It refers to an unknown value. Invert of an unknown value will be unknown only. I hope I make sense. We can discuss more, in case more clarity required.
2) AND gate: An AND gate can absorb ‘X’ if the other input has logic ‘0’. Otherwise, ‘X’ propagates through it. Please refer figure 2 for explanation: The figure indication here is wrong, am I correct?. Output put of AND where one end connect to 0 is 0
ReplyDelete& output of AND that one input connected to 1 should propagate x
Hi
DeleteYes, you are right. I have corrected it. Thanks a lot for pointing it out.