Mice and poisonous bottles

Problem: There are 20 bottles filled with water, out of which exactly one is poisonous. We have to figure out the poisonous one. We have, with us, available some mice. When a mice tastes water from a bottle, it dies after exactly half an hour. We have one hour to figure out the poisonous bottle. What approach we should take.                                (Problem source : www.quora.com)

Solution: Each bottle can either be drunk from by a mice or not; i.e., there are two possibilities. We can interpret this as a binary number system problem wherein '1' represents that the mice has drunk from a bottle and '0' represents it has not.

Now, let us approach with a very simple but un-optimized method. Let us have 20 mice, and assign 1 mice to each bottle (1 mice will dring water from a bottle). After half an hour, one of the mice will die. Clearly, we have the culprit bottle. This solution requires 20 mice. But, we can have a better solution as discussed below. Another option can be to choose 1 mouse only. Let it drink from one bottle, wait for half an hour if it dies. If not, let it drink from next bottle. The maximum this approach can take is 10 hours, which is way more than the budget allocated. So, solution 2 is not for this problem.

To represent number 20, we need 5 binary digits. Let us number each bottle with numbers from 1 to 20 and assign binary code representing that number to the bottle. Now, each of the bottles has a unique 5 bit code. We can assume each bit representative of 1 mouse, '1' shows that the mouse will drink water from this bottle, '0' shows otherwise. 

Let us take an example. Bottle '12' will have code '01100', meaning that mouse 2 and 3 will drink water from it. The code for each bottle and respective interpretation is as shown below:


Bottle no Code Interpretation
1 "00000" No mouse will drink water
2 "00001" Mouse 1 will dring water
3 "00010" Mouse 2 will drink water
4 "00011" Mouse 1 and 2 will drink water
5 "00100" Mouse 3 will drink water
6 "00101" Mouse 1 and 3 will drink water
7 "00110" Mouse 2 and 3 will drink water
8 "00111" Mouse 1,2 and 3 will drink water
9 "01000" Mouse 4 will drink water
10 "01001" Mouse 1 and 4 will drink water
11 "01010" Mouse 2 and 4 will drink water
12 "01011" Mouse 1, 2 and 4 will drink water
13 "01100" Mouse 3 and 4 will drink water
14 "01101" Mouse 1, 3 and 4 will drink water
15 "01110" Mouse 2, 3 and 4 will drink water
16 "01111" Mouse 1, 2, 3 and 4 will drink water
17 "10000" Mouse 5 will drink water
18 "10001" Mouse 1 and 5 will drink water
19 "10010" Mouse 2 and 5 will drink water
20 "10011" Mouse 1, 2 and 5 will drink water

Let us say, bottle 15 had poison. So, after half an hour,  mouse 2, 3 and 4 will die as only these mice drank water from this bottle, with the help of which we will come to know that this bottle contained poison.

Implement 3-input gates using 2:1 muxes

The implementation of 3-input gates using 2:1 muxes requires two stages of multiplexing logic as there is only 1 select line for a mux. Two of the variables can form as the select, one for each stage multiplexers. And the third input can act as the input of the first stage multiplexers depending upon the function needed. In this post, we will illustrate the process building a 3-input AND gate and a 3-input OR gate using 2:1 muxes:

3-input AND gate using 2:1 muxes: As we know, a AND gate's output goes '1' when all its inputs are '1', otherwise it is '0'. The truth table for a 3-input AND gate is shown below in figure 1, where A, B and C are the three inputs and O is the output.
                                      O = A (and) B (and) C
Truth table for 3-input AND gate


If we observe carefully, when A is 0, output is '0'. And when A is 1, output depends upon combination of B and C. So, we need at least two 2:1 muxes to implement 3-input AND gate. The mux closest to output can have A connected to the select, data0 input can be connected to '0'. data1 input needs to be connected to another mux that implements sub-function of B and C.

Now, if we observe the rows with A=1, when B = 0, O = 0. And when B = 1, O = C. So, to implement the sub-function, we need to connect B to select of mux, data0 of mux should be connected to '0' and data1 should be connected to 'C'.

Figure 2 below shows the implementation of 3-input AND gate using 2:1 muxes.
3-input AND gate using 2:1 muxes

3-input OR gate using 2:1 muxes: The output of an OR gate is '0' when all the inputs are '0', otherwise it is '1'. The truth table of a 3-input OR gate is shown in figure 3 below:

Truth table for 3-input OR gate

Looking at the truth table of 3-input OR gate, we see that when A = '1', output also goes '1'. And when A is '0', output is a sub-function of B and C. Seeing at the highlighted portion, when B = 0, output is equal to C. And when B is '1', output is also '1'.
Thus, we can connect the select of output side mux to A, with D0 input connected to another mux implementing sub-function of B and C and D1 input to '1'. The select of mux implementing sub-function can be connected to B, D0 to C and D1 to '1'.

Figure 4 below shows the implementation of 3-input OR gate using 2:1 muxes:


3-input OR gate using 2:1 muxes

3-input NAND gate using 2:1 mux: A NAND gate's output is 0 when all the inputs are 1. For all other combinations of inputs, the output is 1. The truth table for a 3-input NAND gate is shown in figure below. 
O = A (nand) B (nand) C
Truth table for 3-input NAND gate
Let us choose to have a 2:1 mux decoding the value of A. So, the mux closest to output will have its select connected to A. When A = 0, output is 1. So, pin D1 needs to be connected to "1". When A is 1, output is a further function of B and C. So, we need another mux. Let us choose to have B decode the value; i.e. B at the select of mux. When B = 0 & A = 1, O = 1. When B = 1 & A = 1, O = C'. The resulting logic using 2:1 muxes for a 3-input NAND gate is shown in figure below.

3-input NAND gate using 2:1 muxes

3-input NOR gate using 2:1 muxes: A 3-input NOR gate returns 0 when all the inputs are "0", otherwise the output is 1. The truth table for a 3-input NOR gate is shown in figure below.

Truth table for 3-input NOR Gate

Let us choose A to be the select of mux closest to output. When A is "1", output is "0". So, input-1 of the mux will be connected to logic "0". When A is "0", output is further a function of B and C.

Now, looking at the rows where A is "0", let us choose B to select the logic. When B is 1, output is "0" and when B is "0", output is invert of C. Thus, input-1 of this mux will be connected to "0" and other input to C'. Below figure shows the implementation of 3-input NOR gate using 2:1 muxes.
3-input NOR gate using 2:1 muxes
3-input XOR gate using 2:1 muxes: A 3-input XOR gate returns "1" when the odd number of inputs are "1". The truth table for 3-input XOR gate is shown in figure below.

Truth table for 3-input XOR gate
Let us choose A to be the select of mux closest to output. When A is "0", output is a function of B and C. So, we need another mux, let us choose B to be the select of this mux. Among the rows with A = 0, when B is "0", output is equal to C and when B is "1", output is equal to C'.

Similarly among the rows with A = "1", when B is "0", output is equal to C' and when B is "1", output is equal to C. The implementation of 3-input XOR gate using 2:1 muxes is shown in figure below.

3-input XOR gate using 2:1 muxes

3-input XNOR gate using 2:1 muxes
: An XNOR gate returns "1" when even number of inputs are "1". Truth table of XNOR gate is shown in figure below.

Truth table of 3-input XNOR gate
Let us choose A to be the select of mux closest to output. When A is "0", output is a function of B and C. So, we need another mux, let us choose B to be the select of this mux. Among the rows with A = 0, when B is "0", output is equal to C' and when B is "1", output is equal to C.

Similarly among the rows with A = "1", when B is "0", output is equal to C and when B is "1", output is equal to C'. The implementation of 3-input XNOR gate using 2:1 muxes is shown in figure below.

3-iput XNOR gate using 2:1 muxes

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