2-input XNOR gate using 2:1 mux

2-input XNOR gate using 2x1 mux: Figure 1 below shows the truth table of a 2-input XNOR gate. If we observe carefully, OUT equals B' when A is '0' and equals B when A is '1'. So, a 2-input XNOR gate can be implemented from a 2x1 mux, if we connect SEL pin to A, D0 to B' and D1 to B.

Figure 1: Truth table of 2-input XNOR gate

The implementation of 2-input XOR gate using a 2x1 mux is as shown in figure 2.

Figure 2: Implementation of 2-input XNOR gate using 2x1 mux

Similarly, we can observe the output for different values of B and follow the same steps to obtain the XNOR gate implementation.

8x1 multiplexer using 4x1 multiplexer

An 8x1 mux can be implemented using two 4x1 muxes and one 2x1 mux. 4 of the inputs can first be decoded using each 4-input mux using two least significant select lines (S0 and S1). The output of the two 4x1 muxes can be further multiplexed with the help of MSB of select lines at further stage. The implementation of 8x1 using 4x1 and 2x1 muxes is shown in figure 1 below: