VLSI UNIVERSE
Showing posts with label
STA analysis
.
Show all posts
Showing posts with label
STA analysis
.
Show all posts
Can jitter in clock effect setup and hold violations?
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First of all, we need to understand what is meant by jitter. In most simplistic language, jitter is the uncertainty of a clock source in p...
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What is Static Timing Analysis?
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Static timing analysis (STA) is an analysis method of computing the max/min delay values of a complete circuit without actually simulating...
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